Mismatch-based timing errors in current steering DACs

作者: K. Doris , A. van Roermund , D. Leenaerts

DOI: 10.1109/ISCAS.2003.1205729

关键词:

摘要: Current Steering Digital-to-Analog Converters (CS-DAC) are important ingredients in many high-speed data converters. Various types of timing errors such as mismatch based timing …

参考文章(6)
Rudy Plassche, High-speed D/A converters Springer, Boston, MA. pp. 205- 235 ,(2003) , 10.1007/978-1-4757-3768-4_4
K. Doris, D. Leenaerts, A. v. Roermund, High-speed Digital to Analog Converter issues with applications to Sigma Delta Modulators Analog circuit design : structured mixed-mode design, multi-bit sigma-delta converters, short range RF circuits. pp. 205- 233 ,(2002) , 10.1007/0-306-47951-6_10
K. Doris, A. van Roermund, D. Leenaerts, A general analysis on the timing jitter in D/A converters international symposium on circuits and systems. ,vol. 1, pp. 117- 120 ,(2002) , 10.1109/ISCAS.2002.1009791
A.R. Bugeja, B.-S. Song, P.L. Rakers, S.F. Gillig, A 14 b 100 Msample/s CMOS DAC designed for spectral performance international solid-state circuits conference. ,vol. 34, pp. 1719- 1732 ,(1999) , 10.1109/4.808897
D.M.W. Leenaerts, K. Doris, A.H.M. van Roermund, Time Non Linearities in D/A Converters ,(2001)