Synchro-tokens: a deterministic GALS methodology for chip-level debug and test
作者： M.W. Heath , W.P. Burleson , I.G. Harris
DOI: 10.1109/TC.2005.203
关键词:
摘要: This paper describes a novel deterministic globally-asynchronous locally-synchronous (GALS) methodology called "synchro-tokens". Wrappers around the synchronous blocks keep system globally asynchronous while ensuring that each transition, although arriving at nondeterministic time, is sensed by block during cycle of local clock. determinism facilitates debug and test methodologies, such as use stored-pattern testers, which are effective only when behavior predictable repeatable. Applications synchro-tokens to GALS systems with two or more one data channels shown. Synchro-tokens supports both pipelined unpipelined variety clock generation methodologies. Novel schematic level designs wrapper components in 180-nm technology used compare performance several different design styles.
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