Method and computer program for static timing analysis with delay de-rating and clock conservatism reduction
作者： Ruben Molina , Alexander Tetelbaum , Subodh Bhike
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摘要: A method and computer program for static timing analysis includes receiving as input minimum maximum stage delays two corners of an integrated circuit design. path slack a setup check is calculated from the function net clock cycle interval T_clk, launch delay T_LP, capture T_CP, data T_DP, first de-rating factor Y1. hold second Y2. The generated output.
lens.org 参考文章(2)
Peter F. Lindberg, Timing constraints methodology for enabling clock reconvergence pessimism removal in extracted timing models ,(2005)
Toshikatsu Hosono, Takashi Yoneda, LSI design method ,(2004)