Dual function compatible non-volatile memory device

摘要: A dual function memory device architecture compatible with asynchronous operation and synchronous serial operation. The includes one set of physical ports having two different functional assignments. Coupled between the core circuits are input output signal paths or circuits. include shared dedicated buffers coupled to ports, command decoders, a network switches, mode detector. detector determines operating from port, provides appropriate switch selection signal. switches routes signals through in response decoder interprets common control logic necessary for initiating corresponding