作者: David Boland , George A. Constantinides
关键词:
摘要: The freedom over the choice of numerical precision is one key factors that can only be exploited throughout datapath an FPGA accelerator, providing ability to trade accuracy final computational result with silicon area, power, operating frequency, and latency. However, in order tune used hardware accelerators automatically, a tool required verify will meet error or range specification for given precision. Existing tools perform this task typically suffer either from lack tightness bounds require large execution time when applied scale algorithms; work, we propose approach both larger examples obtain tighter bounds, within smaller time, than existing methods. describe also provides user quality procedure, making it suitable word-length optimization framework small large-scale algorithms.We demonstrate use our on instances iterative algorithms solve system linear equations. We show because track how relative decreases increasing precision, unlike methods, create guaranteed properties. This results saving 25% area comparison optimizing using competing analytical techniques, whilst requiring these almost 80% adopting IEEE double arithmetic.