Set associative memory
作者： Stephen A. Ward , Robert C. Zak
DOI:
关键词:
摘要: In a random access memory, dynamic memory array (15) is associated with static data buffers (16). Each buffer connected to the receive and store row of from any addressed array. When an address received, it compared addresses stored in registers buffers. Where there match, controller (22) able select which for column strobe operation without need operation. The resultant system provides set associative cache coupled Further, comparison can be made virtual responds addresses.
google.de 参考文章(14)
Phillip B. Korff, Wesley W. Chu, Multi-access memory module for data processing systems ,(1976)
Roy J Levy, N Bruce Threewitt, Jimmy Madewell, Joseph A Brcich, Apparatus for controlling access to a memory ,(1984)
Masaaki Yoshida, Semiconductor memory device with parallel addressing and data-correcting functions ,(1984)
Roger D. Norwood, Chitranjan Reddy, Semiconductor dynamic memory device with multiplexed sense amplifier and write-activated active loads ,(1984)
Rahul Sud, John D. Heightley, Kim Carver Hardee, Asynchronously equilibrated and pre-charged static ram ,(1981)
Robert J. Proebsting, Paul R. Schroeder, MOSFET Memory chip with single decoder and bi-level interconnect lines ,(1975)
Richard E. Matick, Paul W. Chung, Daniel T. Ling, Dynamic row buffer circuit for DRAM ,(1984)
Eric P. Kronstadt, Sharad P. Gandhi, Distributed cache in dynamic rams ,(1984)
Frederick H. Dill, Richard E. Matick, Dennis J. McBride, Daniel T. Ling, Communicating random access memory ,(1983)
Richard E. Matick, Daniel T. Ling, Distributed, on-chip cache ,(1984)