Multi-access memory module for data processing systems

摘要: Memory apparatus for use in a data processing system and which includes ints entirety number of multi-access modules each formed plurality bit cells. Each module is accessed through multiple independent channels channel capable servicing different request during the same memory cycle. Structurally, coupled by drive line to storage cell energizable close switch mechanism connecting read-write circuit cell. Individual cells have their own circuits mechanisms. Thus, plural requests read-out single can be serviced simultaneously. Special circuitry suggested resolving conflicts arising situations involving simultaneous or write addressed