Associating tag to branch instruction to access array storing predicted target addresses for page crossing targets for comparison with resolved address at execution stage

摘要: A processor configured to facilitate transfer and storage of predicted targets for control instructions (CTIs). In certain embodiments, the may be multithreaded support multiple threads. some a CTI branch target stored by one element tag indicate location target. The associated with rather than associating complete address CTI. When reaches an execution stage processor, used retrieve address. embodiments using target, from different threads interleaved without affecting retrieval targets.