Parallel processing error detection and location circuitry for configuration random-access memory

摘要: Error detection and error location determination circuitry is provided for detecting locating soft errors in random-access-memory arrays on programmable integrated circuits. The contain rows columns of cells. Some the cells are loaded with configuration data produce static output signals that used to program associated regions logic. Cyclic redundancy check correction bits computed each column an array. cyclic stored corresponding During normal operation circuit a system, subject caused by background radiation strikes. uses parallel processing continuously monitor identify row error.