Method for fabricating a mosfet device, with local channel doping and a titanium silicide gate

摘要: A process has been developed in which a deep submicron MOSFET device fabricated, featuring local, narrow threshold voltage adjust region, semiconductor substrate, with the self aligned to an overlying, narrow, polycide gate structure. The consists of forming hole opening insulator layer, where layer overlies polysilicon and layer. An ion implantation procedure, through is used place region specific area underlying opening. Deposition metal followed by anneal converts top portion polysilicon, opening, silicide After removal unreacted metal, patterned, via RIE procedures, using structure as mask, create structure, comprised gate, underlying, region.