Isolation process for high-voltage semiconductor devices

摘要: A semiconductor structure including a pair of single-crystal bulk regions (10.3, 12.2) differing first and second conductivities, respectively, for forming circuits therein, is fabricated whereby each such region electrically isolated from the other rigid body (20) supporting these regions. The formed by at major surface single crystal water (10) having conductivity zone (12.1) conductivity, followed steps (1) in wafer (10.6) thereof V-shaped groove (10.2) boundary using crystallographic orientation dependent etch, order to define (2) dielectric layer (15.1, 15.2) upon walls V-groove exposed portion surface, (3) (20), as polysilicon, 15.2), (4) planarizing exposed, opposed medium down vertices V-grooves. themselves can then be resulting mutually dielectrically 12.2).