Multiple function data processor
作者： James E. Judd
DOI:
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摘要: A data processor includes a reconfigurable arithmetic logic unit (ALU), which three ALU portions. One portion two 16-bit input ports and output port. The other portions each include 8-bit an register file is coupled to the inputs of Switches couple carry terminals second third first portions, respectively. With both switches conductive, 32-bit formed from switch open, independent ALUs are formed. open closed, 24-bit mantissa, 8 bit exponent floating-point processing can be done by ALUs. loops back multiplexer register, outputs loop register. couples words processed
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