60-GHz receiver and transmitter front-ends in 65-nm CMOS
作者： Mikko Karkkainen , Mikko Varonen , Dan Sandstrom , Kari A. I. Halonen
DOI: 10.1109/MWSYM.2009.5165762
关键词:
摘要: In this paper, 60-GHz receiver and transmitter front-ends implemented in 65-nm baseline CMOS are presented. Both down- upconversion mixers employ a spiral transmission line balun for the local oscillator input, thus, creating balanced mixer topology. The has active low noise amplifier on same chip. measured results show that 14.5-dB gain 9.2-dB double sideband figure with 53-GHz 1.5-GHz intermediate frequencies. front-end consists of resistive five-stage medium power amplifier. topology enables wideband LO-suppression as well IF RF responses. 1-dB output compression point at 60 GHz 12 dB −3 dBm, respectively. saturated is +2 dBm. chip sizes 0.90 1.00 mm2 front-end,
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