作者: Dong Wang , Jean-Michel Muller , Nicolas Brisebarre , Milos D. Ercegovac
DOI: 10.1109/TCSII.2014.2331094
关键词:
摘要: Linear (order-1) function evaluation schemes, such as bipartite and multipartite tables, are usually effective for low- precision approximations. For high-output precision, the lookup table size is often too large practical use. This brief investigates so-called (M,p,k) scheme that reduces range of an input argument to a very small interval so trigonometric functions can be approximated with tables few additions/subtractions. An optimized hardware architecture presented implemented in both field-programmable gate array device standard-cell-based technology. Experimental results show proposed achieves more than 50% reduction total chip area compared best linear approach 24-bit evaluation.