Hardware Implementation Trade-Offs of Polynomial Approximations and Interpolations

摘要: This paper examines the hardware implementation trade-offs when evaluating functions via piecewise polynomial approximations and interpolations for precisions of up to 24 bits. In approximations, polynomials are evaluated using stored coefficients. Polynomial interpolations, however, require coefficients be computed on-the-fly by function values. Although it is known that less memory than but at expense additional computations, in memory, area, delay, power consumption between two approaches have not been examined detail. work quantitatively analyzes these optimized across different target precisions. Hardware architectures degree-1 degree-2 described. The results show extent savings realized interpolation significantly lower what commonly believed. Furthermore, experimental on a field-programmable gate array (FPGA) that, high output precision, offer considerable area over similar compared. availability both interpolation-based approximation-based designs offers richer set design available either or approximation alone.