Hardware Streaming Unit
作者： Darryl J Gove , David L Weaver , Gerald Zuraski
DOI:
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摘要: A processor having a streaming unit is disclosed. In one embodiment, includes or more execution units configured to execute instructions of instruction set. The further first the set, wherein executing comprises loading data stream from memory computer system responsive instruction. plurality elements. argument indicating starting address stream, second stride between elements, and third indicative an ending stream. output corresponding
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