作者: James M Norris , Kent Donald Moat , Brian Geoffrey Lucas , Ali Saidi , Silviu Chiricescu
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摘要: A re-configurable, streaming vector processor (100) is provided which includes a number of function units (102), each having one or more inputs for receiving data values and an output providing value, re-configurable interconnection switch (104) micro-sequencer (118). The links, link operable to couple unit (102) input as directed by the may also include input-stream (122) retrieving from memory. Each host has defined interface (116) processor. output-stream (124) writing memory