Apparatus and method for invalidation of redundant branch target address cache entries

作者: Thomas McDonald

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摘要: An apparatus for invalidating redundant entries in an N-way set associative branch target address cache (BTAC) the same instruction is disclosed. index portion of fetch applied to BTAC select a N ways therein. Control logic detects condition which more than one selected has valid tag that matches address. A flag indicate occurrence condition, and stored register. The control subsequently invalidates all but having tag.

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