Memory cell with vertical transistor

作者: Huang Ching-Chia

DOI:

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摘要: The present disclosure provides a memory cell. cell includes substrate, deep trench capacitor formed in the and vertical transistor on substrate electrically connected to capacitor. source region drain stacked channel vertically sandwiched between region, gate structure annularly wrapping around region.

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Schrems Martin, Radens Carl J, Gruening Ulrik, A method for fabricating a trench capacitor ,(2003)
Günter Gerstmeier, Michael Bernhard Sommer, Integrated semiconductor memory ,(2004)