Apparatus and method for controlling exclusive access to portions of addressable memory in a multiprocessor system

摘要: A method and apparatus for granting exclusive access to a selected portion of addressable memory requesting processor in large scale multiprocessor system. An instruction having store-through operand cache executes an requiring address shared memory. If the upon which lock is requested not local cache, simultaneously sends read request coupled storage controller. Otherwise, no-operand-read sent If, while processing request, no conflict detected by controller, marked as locked granted signal issued processor. Concurrent with controller processes request. The data are returned asynchronously. can continue when required have been from When two or more processors contend on same memory, one other contending processor(s) forced wait. Lock contention arbitrated round robin priority scheme.