Redundant clock system

摘要: The invention discloses a redundant clock system, comprising n numbered modules. Each lock module comprises high frequency unit and parallel processing unit, wherein the is used for generating with failure safe characteristics reset signal comparator, an error state latch removal logic; synchronous output voting circuit, comparator logic. Aiming at logical leaks Byzantine faults of judging own fault by self, or others to switch, which occur in traditional method achieving clock, takes M based on N uses achieve reliable clock.