Redundant synchronous clock distribution for computer systems

摘要: A system and method for providing redundant, synchronized clocks in a computer system. Upon failure of master clock signal, the switches over to slave signal with signal. Switching logic is coupled receive first second The switching selects either or as local further monitors failure. If monitored, accepts place One more loads operate according may control input phase locked loop (PLL) that provides loads. includes PLL synchronizing an output used by at least one load timing. notifies controller PLL, causes fail-over take source provide reference source. Clock automatic does not interrupt interfere operation