Method of forming deep sub-micron CMOS transistors with self-aligned silicided contact and extended S/D junction

作者: Shye-Lin Wu

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摘要: The present invention includes forming an oxide layer on a substrate. An undoped polysilicon layers is deposited by chemical vapor deposition the gate layer. Next, silicon nitride successively formed to act as anti-reflective coating (ARC). Then, layer, ARC and are patterned form ultra short channel gates. A thermal annealing performed recover etching damage in substrate generate pad surface of nitrogen-doped amorphous structure oxide. ion implantation carried out dope dopants into substrate, thereby source drain. steam oxidation convert dioxide Simultaneously, ultra-shallow extended drain junction adjacent obtained using diffusion source. Subsequently, etched back spacers. cap removed. two-step silicidation process used silicided contacts.

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