Method and apparatus for a dual power supply to embedded non-volatile memory

作者: Jean-Michel Daga

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摘要: A charge pump (407) is configured to receive the external voltage level (405) and generate a high (415), wherein higher than level. memory control circuit (420) level, select one of oltage levels. array (430), with word line bit line, levels at line. driver (440) provide selector (455) high, external, regulated (450) (455).

参考文章(21)
Peter Hazen, Mark E. Bauer, Sherif Sweha, High-speed tri-level decoder with dual-voltage isolation ,(1991)
Valeria Germini, Dual sourced voltage supply circuit ,(1995)
Tien-Ler Lin, Liang No Chao, Negative voltage generator for flash EPROM design ,(1993)
Jahanshir J. Javanifard, Marc E. Landgraf, Charge pump circuit for providing multiple output voltages for flash memory ,(1994)
Antonio Matalvo, Chi Chang, Michael A. Van Buskirk, Sameer S. Haddad, Flash EEPROM array with negative gate voltage erase operation ,(1989)
Takeo Okamoto, Junko Matsumoto, Tadaaki Yamauchi, Semiconductor memory device operating with low power consumption ,(2001)
Caroline Papaix, Jean Michel Daga, Jeanine Guichaoua, Single-ended current sense amplifier ,(2003)