Negative voltage generator for flash EPROM design

作者: Tien-Ler Lin , Liang No Chao

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摘要: A circuit is provided for supplying a negative high voltage to an integrated from positive source Vpp. The applied plurality of FLASH electrically erasable programmable read only memory (EPROM) cells. includes oscillator coupled converter which provides periodic signal. signal charge pump (3) including three P-channel type transistors produced the voltage. and drain first transistor (41) second transistor's (43) gate reference ground potential with gate. Finally, third outputs floating gates EPROM cells during erase operation. Further, generated relatively precise, so no regulation required.

参考文章(17)
Harvey J. Steigler, Benjamin H. Ashmore, John F. Schreck, Phat C. Truong, Nonvolatile memory array wordline driver circuit with voltage translator circuit ,(1993)
Chung K. Chang, Johnny C. Chen, Antonio Montalvo, Lee E. Cleveland, Michael A. Van Buskirk, Negative power supply ,(1992)
Antonio Matalvo, Chi Chang, Michael A. Van Buskirk, Sameer S. Haddad, Flash EEPROM array with negative gate voltage erase operation ,(1989)
Nola Frank J, Berry Eugene H, Positive dc to negative dc converter ,(1967)