作者: Dongwoo Lee , Wesley Kwong , David Blaauw , Dennis Sylvester
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摘要: In this paper we address the growing issue of gate oxide leakage current (I/sub gate/) at circuit level. Specifically, develop a fast approach to analyze total power large block, considering both I/sub gate/ and subthreshold sub/). The interaction between sub/ complicates analysis in arbitrary CMOS topologies propose simple accurate heuristics based on table look-ups quickly estimate state-dependent within 1% SPICE. We then make several observations impact designs that are standby limited, including role device ordering stack differing state dependencies for NOR vs. NAND topologies. Based these observations, use pin recording as means reduce due node voltages.