High-speed flow-based classification on FPGA

摘要: Analyzing the composition of Internet traffic has many applications nowadays, like tracking bandwidth-consuming applications, QoS-based engineering and lawful interception illegal traffic. Even though flow-based classification methods, such as support vector machines SVM, have demonstrated their accuracy, few practical implementations lightweight classifiers exist. We consider in this paper design a real-time SVM classifier at hundreds Gb/s to allow online detection categories applications. also implement high-speed flow reconstruction algorithm able handle one million concurrent flows. The solution is based on massive parallelism low-level network interface access FPGA boards. find maximum supported bit rates up 408 for 20 GB/s most challenging trace. Results are confirmed using commercial Combov2 board with Virtex 5 FPGA. Copyright © 2014 John Wiley & Sons, Ltd.