Selective dry-etching process for fabricating Ge gate-all-around field-effect transistors on Si substrates

作者: Shu-Han Hsu , Chun-Lin Chu , Guang-Li Luo

DOI: 10.1016/J.TSF.2013.06.024

关键词:

摘要: Abstract A process for removing defective Ge layers near Ge/Si interface during active region definition, thus allowing nearly defect-free channels, was investigated. By adjusting the HBr/Cl 2 plasma ratio and bias power, different fin-like field-effect transistor structures can be fabricated. This allowed better gate control than conventional rectangular fins due to gate-all-around (GAA) fin fabricated using process. Additionally, because effective width of triangular is larger fins, GAA field effect transistors also have a higher current density. technique used obtain suspended from epitaxial grown over Si substrates, as well other alloy semiconductors, an integration device.

参考文章(14)
GM Atkinson, RL Kubena, LE Larson, LD Nguyen, FP Stratton, LM Jelloian, MV Le, H McNulty, None, Self-aligned high electron mobility transistor gate fabrication using focused ion beams Journal of Vacuum Science & Technology B: Microelectronics and Nanometer Structures. ,vol. 9, pp. 3506- 3510 ,(1991) , 10.1116/1.585833
Hsin-Chiao Luan, Desmond R. Lim, Kevin K. Lee, Kevin M. Chen, Jessica G. Sandland, Kazumi Wada, Lionel C. Kimerling, High-quality Ge epilayers on Si with low threading-dislocation densities Applied Physics Letters. ,vol. 75, pp. 2909- 2911 ,(1999) , 10.1063/1.125187
K. Romanjek, E. Augendre, W. Van Den Daele, B. Grandchamp, L. Sanchez, C. Le Royer, J.-M. Hartmann, B. Ghyselen, E. Guiot, K. Bourdelle, S. Cristoloveanu, F. Boulanger, L. Clavelier, Improved GeOI substrates for pMOSFET off-state leakage control Microelectronic Engineering. ,vol. 86, pp. 1585- 1588 ,(2009) , 10.1016/J.MEE.2009.03.069
Weidong Jin, Steven A. Vitale, Herbert H. Sawin, Plasma–surface kinetics and simulation of feature profile evolution in Cl[sub 2]+HBr etching of polysilicon Journal of Vacuum Science & Technology A: Vacuum, Surfaces, and Films. ,vol. 20, pp. 2106- 2114 ,(2002) , 10.1116/1.1517993
A. Abbadie, F. Allibert, F. Brunier, Defect delineation and characterization in SiGe, Ge and other semiconductor-on-insulator structures international sige technology and device meeting. ,vol. 53, pp. 850- 857 ,(2009) , 10.1016/J.SSE.2009.04.033
P. Tsipas, A. Dimoulas, Modeling of negatively charged states at the Ge surface and interfaces Applied Physics Letters. ,vol. 94, pp. 012114- ,(2009) , 10.1063/1.3068497
Demetre J. Economou, Richard C. Alkire, Effect of Potential Field on Ion Deflection and Shape Evolution of Trenches during Plasma‐Assisted Etching Journal of The Electrochemical Society. ,vol. 135, pp. 941- 949 ,(1988) , 10.1149/1.2095842
Guang-Li Luo, Shih-Chiang Huang, Chih-Hsin Ko, Clement H. Wann, Cheng-Ting Chung, Zong-You Han, Chao-Ching Cheng, Chun-Yen Chang, Hau-Yu Lin, Chao-Hsin Chien, The Annihilation of Threading Dislocations in the Germanium Epitaxially Grown within the Silicon Nanoscale Trenches Journal of The Electrochemical Society. ,vol. 156, ,(2009) , 10.1149/1.3158832
Jia Feng, Raymond Woo, Shulu Chen, Yaocheng Liu, P.B. Griffin, J.D. Plummer, P-Channel Germanium FinFET Based on Rapid Melt Growth IEEE Electron Device Letters. ,vol. 28, pp. 637- 639 ,(2007) , 10.1109/LED.2007.899329