A genetic approach to automatic bias generation for biased random instruction generation

摘要: Biased random instruction generators are commonly used in architectural verification of microprocessors, with biases specified manually by designers. As the complexity processors grows, so does specifying biases. Automatic bias generation speeds up flow and may lead to better coverage potential design errors. In this work, we present a genetic algorithm based framework automatically generate We target utilization specific buffers for new version PowerPC architecture. Our results show that GA is effective achieving high buffer utilization. Also, targeting multiple objectives, best approach use depends on whether objectives related.