Method for making DRAM using an oxide plug in the bitline contacts during fabrication
作者： Erik S. Jeng
DOI:
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摘要: The conventional capacitor-under-bitline (CUB) DRAM structure faces problems of high photoresist developing aspect ratio and step-height. present invention discloses a with planar upper-plate the forms an opening broader than bitline contacts at top lower-plate neighboring to isolate from contacts, step height interface between peripheral circuit cell arrays almost does not exist. Furthermore, could be solved because oxide plug during producing thick deposited on circuit. A lightly doped polysilicon is silicon wafer substrate avoid current leakage lower-plate.
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