作者: Sami J Habib , Mohammad Gh Mohammad , None
DOI: 10.1109/INNOVATIONS.2006.301925
关键词:
摘要: Setting up of an assembly line for the manufacturing application-specific integrated circuits (ASICs) is very expensive, which may cost in range several hundred million dollars, and take manpower years. In this paper, we present Q8WARE tool, a small-scale version ASIC through usage Altera education FPGA board (UP2) Verilog. adaptable heterogeneous ASICs reusability hardware modules between ICs. We have explored implementation token ring to be used as network-on-chip (NoC) with various protocol reconfigurations.