摘要: A design technique for low-voltage, micropower continuous-time filters implementing CMOS devices operating in weak inversion is presented. The basic building block the log-domain integrator. effects of MOS device nonidealities on integrator are investigated and verified by HSPICE simulations. 5th-order Chebyshev lowpass ladder filter was designed simulated. operates with low supply voltage 1.5 V to achieve a cutoff frequency tunable range 100 Hz–100 kHz, it has power dissipation 254 nW/pole at kHz. laid out using 0.35-μm mixed-mode polycide technology occupies die area 0.04 mm^2 without i/o pads
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