作者: Subhash Gupta , Rich Klein , Ming-Ren Lin , Steven Avanzino , Scott D. Luning
DOI:
关键词:
摘要: A dual damascene method of fabricating an interconnection level conductive lines and connecting vias separated by insulation for integrated circuits substrate carriers semiconductor devices using a sacrificial via fill. first layer insulating material is formed with openings. The openings are filled removable material. second deposed on the layer. In one embodiment, etch selectivity to etchant essentially same as fill and, preferably, substantially higher than Using line pattern aligned openings, etched in during etching, removed from not etchable forming after formation which resistive or less selective. now deposited