Method of fabricating a capacitor with a low-resistance electrode structure in integrated circuit

摘要: A semiconductor fabrication method is provided for fabricating a capacitor with low-resistance electrode structure in mixed-mode integrated circuit (IC) device. The first step to prepare substrate having area where gate and pair of source/drain regions are defined second defined. dielectric layer then formed cover the electrode. After this, doped polysilicon layer, metal silicide successively over which combination constitute capacitor. incorporation can significantly help reduce overall resistance electrode, thereby allowing considerable increase performance resulting IC Moreover, less complex process thus easier perform than prior art.