Method for packaging semiconductors at a wafer level
作者： Ward G. Fillmore , Scott Macdonald , William J. Davis
DOI:
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摘要: A method for packaging a plurality of semiconductor devices formed in surface portion wafer. The includes: lithographically forming, first processable material disposed on the wafer, device exposing openings to expose and electrical contact pad pads devices; mounting support having rigid dielectric layer selected support, such comprising second material, being suspended over removed from portions contacts material. is released leaving photolithographically bonded
lens.org参考文章(31)
Thomas Goida, Die coat perimeter to enhance semiconductor reliability ,(2007)
Kenneth B. Gilleo, A package for microchips ,(2003)
Paul Setzco, Thomas E. Kazior, John P. Wendler, James L. Lampen, Michael G. Kizner, Direct backside interconnect for multiple chip assemblies ,(1997)
Sehat Sutardja, Integrated circuit with low dielectric loss packaging material ,(2006)
Gottfried Beer, Horst Theuss, Microelectromechanical semiconductor component with cavity structure and method for producing the same ,(2007)
A. Jourdain, P. De Moor, S. Pamidighantam, H.A.C. Tilmans, Investigation of the hermeticity of BCB-sealed cavities for housing (RF-)MEMS devices international conference on micro electro mechanical systems. pp. 677- 680 ,(2002) , 10.1109/MEMSYS.2002.984361
Philip C. Smith, Li-Shu Chen, Thomas J. Moloney, Howard Fudem, Wafer scale package and method of assembly ,(2004)
Takashi Kawakubo, Takaaki Yasumoto, Kazuhiko Itaya, Wafer-level package and its manufacturing method ,(2004)
Kieran P. Harney, Carl M. Roberts, Lawrence E. Felton, Wafer level capped sensor ,(2005)
Todd O. Bolken, Chad A. Cobbley, Methods of fabrication of package assemblies for optically interactive electronic devices and package assemblies therefor ,(2006)