作者: Masaya Miyahara , Hironori Sakaguchi , Naoki Shimasaki , Akira Matsuzawa
DOI: 10.1109/RFIC.2012.6242330
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摘要: This paper presents low-power, small area analog baseband (ABB) circuits for 60 GHz wireless transceiver in 40 nm CMOS. The ABB consist of 0-to-40 dB VGAs and 5-bit 2304 MS/s flash ADCs the receiver, 6-bit 3456 DACs transmitter. also work as 2-2-1 order low-pass filters by using negative capacitance generator. receiver demonstrates SNDR 27.3 at with 16 VGA gain. DAC SFDR up to 200 MHz. VGAs, consume 18 mW, 24 mW 42 from a 1.1 V supply, respectively. entire occupy an 0.36 mm2.