Constant power consumption design of novel differential logic gate for immunity against differential power analysis

摘要: Differential power analysis (DPA) method is frequently used for the non-invasive side-channel attack to hack into system. This study proposes a novel DPA immune design of basic gates, which show dense distribution autocorrelation and strong salience strength around 60%. The has highly regular structure with exactly similar evaluation path both differential outputs, AND-NAND, OR-NOR can be easily extended n -bit inputs. effort minimal as such that AND-NAND obtain function by just changing placement These gates have 0.46× less propagation delay, 3.7× higher consumption in comparison other published work. designs are simulated using Cadence tool TowerJazz CMOS 180 nm technology supply 1.8 V.