Decision tree ensemble hardware accelerators for embedded applications
作者： R. Struharik
DOI: 10.1109/SISY.2015.7325359
关键词:
摘要: This paper presents four different architectures for the hardware acceleration of axis-parallel, oblique and non-linear decision tree ensemble classifier systems. Hardware implementation a number combination rules are also presented. The proposed optimized size, making them particularly interesting embedded applications where size system is critical constraint. Proposed suitable using FPGA ASIC technology. Experiment results obtained 29 datasets from standard UCI Machine Learning Repository database suggest that implementations offer significant improvement in classification time comparison with pure software implementations.
sci-hub.se 参考文章(25)
Cha Zhang, Yunqian Ma, None, Ensemble Machine Learning: Methods and Applications Springer. ,(2012)
Shigeo Abe, Support Vector Machines for Pattern Classification ,(1999)
Kevin P. Murphy, Machine Learning : A Probabilistic Perspective ,(2012)
Bing Liu, Web Data Mining: Exploring Hyperlinks, Contents, and Usage Data ,(2010)
Peter Flach, Machine Learning: The Art and Science of Algorithms that Make Sense of Data ,(2012)
Xindong Wu, Vipin Kumar, None, The Top Ten Algorithms in Data Mining Chapman and Hall/CRC. ,(2009) , 10.1201/9781420089653
Mark A. Hall, Ian H. Witten, Eibe Frank, Data Mining: Practical Machine Learning Tools and Techniques ,(1999)
Oded Maimon, Lior Rokach, Data Mining with Decision Trees: Theory and Applications ,(2007)
Y.S. Huang, C.Y. Suen, The behavior-knowledge space method for combination of multiple classifiers computer vision and pattern recognition. pp. 347- 352 ,(1993) , 10.1109/CVPR.1993.1626170