Method and system for resolving interoperability of multiple types of dual in-line memory modules
作者： Jayesh R. Bhakta , Hyun Lee , Paresh Sheth
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摘要: Systems and methods are described for resolving certain interoperability issues among multiple types of memory modules in the same subsystem. The system provides a single data load DIMM constructing high density speed subsystem that supports standard JEDEC RDIMM interface while presenting to controller. At least one module includes or more DRAM, bi-directional buffer an bridge with conflict resolution block. translates CAS latency (CL) programming value controller sends program DRAMs, modifies value, is used command conflicts between DRAMs insure proper operation
lens.org 参考文章(5)
Alan J. Wilson, Jeffrey P. Wright, Todd D. Farrell, Victor Wong, Apparatus and method for buffered write commands in a memory ,(2009)
Richard Perego, Fred Ware, Ely Tsern, Configurable width buffered module having switch elements ,(2004)
Michael Lewis Takefman, Maher Amer, Load reduction dual in-line memory module (LRDIMM) and method for programming the same ,(2013)
Keith R. Schakel, Michael John Sebastian Smith, Frederick Daniel Weber, Suresh Natarajan Rajan, David T. Wang, Multiple-component memory interface system and method ,(2006)
Chul Woo Park, Semiconductor memories with block-dedicated programmable latency register ,(2006)