作者: O.-X. Standaert , E. Peeters , G. Rouvroy , J.-J. Quisquater
DOI: 10.1109/JPROC.2005.862437
关键词:
摘要: Since their introduction by Kocher in 1998, power analysis attacks have attracted significant attention within the cryptographic community. While early works field mainly threatened security of smart cards and simple processors, several recent publications shown vulnerability hardware implementations as well. In particular, programmable gate arrays are attractive options for implementation encryption algorithms,but against is a serious concern, we discuss this paper. For purpose, present results attempted standard algorithms, provide theoretical estimation these based on statistical parameters evaluate cost different possible countermeasures.