Address system for bus interconnected computer system

摘要: A computer system employs a CPU interconnected to number of devices and terminals over common bus. Each device has different address assigned it message from one another, the bus, is prefixed with receiving device's address. To simplify hardware input/output connected all such have an abbreviated prefix class. decoder detects when this transmitted on bus sends signal line that connects only these devices. When receive they examine portion are activated coincidence detected.