作者: George L. Brantingham , Warren S. Graber
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摘要: An address decode scheme decodes lines using a minimum number of electrical conductors and area on the chip. Instead decoding true complementary signals each input PLA or static gate, present uses two sets programmable transistors for respectively detecting zeros ones generating selected high low in conjunction with precharge, discharge, control transistors. This invention is equally effective CMOS, NMOS, PMOS technologies.