A Layout Verification System for Analog Bipolar Integrated Circuits
作者： Erich Barke
关键词:
摘要: A new layout verification system, called ALAS (A Layout Analysis System) is presented. Its main intention to tackle the particular problems of analog bipolar circuits. At present, system comprises four parts: a device recognition program produces list devices, plot converts these data layout-oriented circuit diagram, connectivity analysis yields device-oriented or net-oriented descriptions derived and network comparison tests consistency this actual with intended nominal one. fifth program, that will calculate parameters circuit, under development. To derive from uses geometrical mask only; no additional information needed. If not available design description may be supplied manually in SPICE-like input format.
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sci-hub.st 参考文章(8)
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