Digitally Assisted Analog and RF Circuits

R.B. Staszewski, K. Muhammad, D. Leipold, Chih-Ming Hung, Yo-Chuol Ho, J.L. Wallberg, C. Fernando, K. Maggio, R. Staszewski, T. Jung, Jinseok Koh, S. John, Irene Yuanying Deng, V. Sarda, O. Moreira-Tamayo, V. Mayega, R. Katz, O. Friedman, O.E. Eliezer, E. de-Obaldia, P.T. Balsara, All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS IEEE Journal of Solid-state Circuits. ,vol. 39, pp. 2278- 2291 ,(2004) , 10.1109/JSSC.2004.836345

Behzad Razavi, A 300-GHz Fundamental Oscillator in 65-nm CMOS Technology IEEE Journal of Solid-state Circuits. ,vol. 46, pp. 894- 903 ,(2011) , 10.1109/JSSC.2011.2108122

Supisa Lerstaveesin, Bang-Sup Song, A Complex Image Rejection Circuit With Sign Detection Only IEEE Journal of Solid-state Circuits. ,vol. 41, pp. 2693- 2702 ,(2006) , 10.1109/JSSC.2006.884183

Koji Takinami, Koichi Mizuno, Takahiro Shima, Junji Sato, A 60 GHz CMOS PLL synthesizer using a wideband injection-locked frequency divider with fast calibration technique asia-pacific microwave conference. pp. 1530- 1533 ,(2011)

P.M. Levine, G.W. Roberts, A high-resolution flash time-to-digital converter and calibration scheme international test conference. pp. 1148- 1157 ,(2004) , 10.1109/TEST.2004.1387389

Wei Deng, A. Musa, T. Siriburanon, M. Miyahara, K. Okada, A. Matsuzawa, A 0.022mm 2 970µW dual-loop injection-locked PLL with −243dB FOM using synthesizable all-digital PVT calibration circuits international solid-state circuits conference. pp. 248- 249 ,(2013) , 10.1109/ISSCC.2013.6487720

B. Razavi, Design considerations for direct-conversion receivers IEEE Transactions on Circuits and Systems Ii: Analog and Digital Signal Processing. ,vol. 44, pp. 428- 435 ,(1997) , 10.1109/82.592569

Skyler Weaver, Benjamin Hershberg, Un-Ku Moon, Digitally Synthesized Stochastic Flash ADC Using Only Standard Digital Cells IEEE Transactions on Circuits and Systems I: Regular Papers. ,vol. 61, pp. 84- 91 ,(2014) , 10.1109/TCSI.2013.2268571

Kenichi Okada, Keitarou Kondou, Masaya Miyahara, Masashi Shinagawa, Hiroki Asada, Ryo Minami, Tatsuya Yamaguchi, Ahmed Musa, Yuuki Tsukui, Yasuo Asakura, Shinya Tamonoki, Hiroyuki Yamagishi, Yasufumi Hino, Takahiro Sato, Hironori Sakaguchi, Naoki Shimasaki, Toshihiko Ito, Yasuaki Takeuchi, Ning Li, Qinghong Bu, Rui Murakami, Keigo Bunsen, Kota Matsushita, Makoto Noda, Akira Matsuzawa, Full Four-Channel 6.3-Gb/s 60-GHz CMOS Transceiver With Low-Power Analog and Digital Baseband Circuitry IEEE Journal of Solid-state Circuits. ,vol. 48, pp. 46- 65 ,(2013) , 10.1109/JSSC.2012.2218066

Wei Deng, Dongsheng Yang, Tomohiro Ueno, Teerachot Siriburanon, Satoshi Kondo, Kenichi Okada, Akira Matsuzawa, A Fully Synthesizable All-Digital PLL With Interpolative Phase Coupled Oscillator, Current-Output DAC, and Fine-Resolution Digital Varactor Using Gated Edge Injection Technique IEEE Journal of Solid-state Circuits. ,vol. 50, pp. 68- 80 ,(2015) , 10.1109/JSSC.2014.2348311