作者: Sanada Koji
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摘要: PURPOSE:To guarantee a low electric consumption when power source voltage is inside prescribed range and to stable operation without malfunction the outside range. CONSTITUTION:A detecting circuit 3, which outputs signals PVD that are in high level VDD it range, provided. A switching 4, transmits delay 5 an internal clock pulse P1 from address change 1 does not transmit such level, control signal generating 2 made be memory access (WES, SAE) manners as only first section within cycle becomes activated delayed P2 inputted, second longer than 1st there no input of P2.