作者: Cheng-Yuan Hsu , Chi-Shan Wu , Min-San Huang , Chih-Wei Hung
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摘要: A flash memory cell structure is provided. The includes a substrate, gate structure, source region, an erase gate, dielectric layer, select layer and drain region. set up over the substrate. tunneling oxide floating inter-gate control spacer. region formed in substrate on one side of structure. between another gate.