Recessed shallow trench isolation

作者： Wen Jer Tsai , Chih Chieh Yeh

DOI:

关键词:

摘要: In some embodiments, a memory integrated circuit has different shallow trench isolation structures in the circuitry of and control circuit. The dielectric fills trenches to degrees. with intermediate regions. supports channel between neighboring nonvolatile devices supporting multiple current components orientations. recessed are formed.

google.com 本地加速

freepatentsonline.com 本地加速

lens.org UNKNOWN 下载加速

freepatentsonline.com UNKNOWN 下载加速

参考文章(12)

Chi Chang, Mark S. Chang, Yu Sun, Unsoon Kim, Angela Hui, Yider Wu, Formation of STI (shallow trench isolation) structures within core and periphery areas of flash memory device ,(2001)

Josef Willer, Memory cell and production method ,(2001)

Michael Violette, Isolation trenches for memory devices ,(2005)

Jun Sumino, Satoshi Shimizu, Non-volatile semiconductor memory device and method of fabricating the same ,(2003)

Boaz Eitan, Non-volatile semiconductor memory cell utilizing asymmetrical charge trapping ,(1997)

Ya-Chin King, Tsu-Jae King, Chenming Hu, Charge-trap memory device fabricated by oxidation of Si/sub 1-x/Ge/sub x/ IEEE Transactions on Electron Devices. ,vol. 48, pp. 696- 700 ,(2001) , 10.1109/16.915694

J.H. Chen, Y.Q. Wang, W.J. Yoo, Y.-C. Yeo, G. Samudra, D. Chan, A.Y. Du, D.-L. Kwong, Nonvolatile flash memory device using Ge nanocrystals embedded in HfAlO high-/spl kappa/tunneling and control oxides: Device fabrication and electrical performance IEEE Transactions on Electron Devices. ,vol. 51, pp. 1840- 1848 ,(2004) , 10.1109/TED.2004.837011

Dong-ho Ahn, Method of fabricating floating gates in semiconductor device ,(2000)

Wook-Hyoung Lee, Non-volatile memory device to protect floating gate from charge loss and method for fabricating the same ,(2003)

Eng Hua Lim, Chun Hui Low, Soh Yun Siah, Kong Hean Lee, Chong Wee Lim, Silicon nitride capped shallow trench isolation method for fabricating sub-micron devices with borderless contacts ,(2001)