作者: C. Lageweg , S. Cotofana , S. Vassiliadis
DOI: 10.1109/ICSICT.2001.982159
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摘要: In this paper we investigate achieving fanout in single electron encoded logic networks. First, propose an implementation of a charge amplifier and demonstrate its behavior via simulation. Second, cascade the proposed with existing design for linear threshold gate cascaded blocks Third, simulation that have achieved capability network consisting basic building form gate.