Achieving fanout capabilities in single electron encoded logic networks

作者: C. Lageweg , S. Cotofana , S. Vassiliadis

DOI: 10.1109/ICSICT.2001.982159

关键词:

摘要: In this paper we investigate achieving fanout in single electron encoded logic networks. First, propose an implementation of a charge amplifier and demonstrate its behavior via simulation. Second, cascade the proposed with existing design for linear threshold gate cascaded blocks Third, simulation that have achieved capability network consisting basic building form gate.

参考文章(6)
Eric Foxley, Edmund Burke, Logic and Its Applications ,(1996)
Christoph Wasshuber, Hans Kosina, A single-electron device and circuit simulator Superlattices and Microstructures. ,vol. 21, pp. 37- 42 ,(1997) , 10.1006/SPMI.1996.0138
K.K. Likharev, Single-electron devices and their applications Proceedings of the IEEE. ,vol. 87, pp. 606- 632 ,(1999) , 10.1109/5.752518
ALEXANDER N. KOROTKOV, Single-electron logic and memory devices International Journal of Electronics. ,vol. 86, pp. 511- 547 ,(1999) , 10.1080/002072199133256
C. Lageweg, S. Cotofana, S. Vassiliadis, A linear threshold gate implementation in single electron technology Proceedings IEEE Computer Society Workshop on VLSI 2001. Emerging Technologies for VLSI Systems. pp. 93- 98 ,(2001) , 10.1109/IWV.2001.923145