Robust circuit and system design methodologies for nanometer-scale devices and single-electron transistors
作者： A. Schmid , Y. Leblebici
DOI: 10.1109/NANO.2003.1230960
关键词: Electronic engineering 、 MOSFET 、 Robustness (computer science) 、 Fault tolerance 、 Transistor 、 Electronic circuit 、 CMOS 、 Transistor model 、 Systems design 、 Computer science
摘要: This paper addresses the functional robustness and fault-tolerance capability of very-deep submicron CMOS single-electron transistor (SET) circuits. A set guidelines is identified for design very high-density digital systems using inherently unreliable error-prone devices. Empirical results based on SPICE simulations show that proposed method improves fault immunity at level. Graceful degradation circuit performance allows recovery information, where classical circuits would fail.
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