System and method including broadcasting an address translation invalidation instruction with a return marker to indentify the location of data in a computing system having mutiple processors

作者: Schumann John A , Yokum Karen , Cockcroft Bryant , Chatterjee Debapriya , Leitner Lawrence

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摘要: A method, computer program product, and system are disclosed that in one or more embodiments includes issuing, from an issuing processor the system, address translation invalidation instruction with a return marker, wherein is to invalidate entries storage locations marker comprises information indicating identity of each where invalidated entry was located. The embodiment further broadcasting processors other than processor; invalidating corresponding broadcasted instruction; returning on location entry. In embodiments, returned used determine performance computing identifying data

参考文章(9)
Adam J. Muff, Paul E. Schardt, Matthew R. Tubbs, Robert A. Shearer, Translation management instructions for updating address translation data structures in remote processing nodes ,(2013)
Boris Weissman, Min Xu, Vyacheslav Vladimirovich Malyugin, Ganesh Venkitachalam, Synchronizing a translation lookaside buffer with page tables ,(2015)
Matthew L. Evans, Andrew Christopher Rose, Hakan Lars-Goran Persson, Gareth Stockwell, Jason Parker, Invalidating stored address translations ,(2014)
Mukherjee Shubhendu Sekhar, INSTRUCTION CACHE TRANSLATION MANAGEMENT ,(2016)
Manoj Dusanapudi, Vinod Bussa, Shakti Kapoor, Identifying stale entries in address translation cache ,(2017)
Guy L. Guthrie, Hugh Shen, Derek E. Williams, Translation entry invalidation in a multithreaded data processing system ,(2015)